Multi-band massive mimo antenna array

ABSTRACT

Methods disclosed herein may include configuring a plurality of transceiver modules in an antenna array with assigned receive signal weighting factors, the transceiver modules interconnected with high-speed data communication buses, and each transceiver module positioned adjacent to a respective antenna element in the antenna array; configuring the plurality of transceiver modules into inter-communicating module groups by enabling the associated high-speed data communication buses; receiving a plurality of wireless data signals with the plurality of transceiver modules and responsively generating a corresponding plurality of receive baseband data signals; generating a plurality of received beamformed signals by combining subsets of the receive baseband signals within each module group using the assigned receive signal weighting factors by transmitting the receive baseband signals between the transceiver modules within the module group; and demodulating the received beamformed signals.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of U.S. application Ser. No.17/264,776, filed Jan. 29, 2021, which is a 35 U.S.C. 371 ofInternational Application PCT/US2019/044246, entitled, “SYSTEM ANDMETHOD FOR MASSIVE MIMO COMMUNICATIONS,” filed Jul. 30, 2019, which is anon-provisional filing of, and claims the benefit under 35 U.S.C. §119(e) from, U.S. Provisional Patent Application Ser. No. 62/712,172,filed Jul. 30, 2018, which is hereby incorporated herein by reference inits entirety. The inventions described herein were made pursuant to ajoint research agreement entered into between InnoPhase, Inc., andParallel Wireless, Inc.

BACKGROUND

Some communication systems have high bill of material (BOM) costs andproblems with heat sinks. Some communication systems also have a largenumber of components on a circuit board. Some communication systems alsoare inefficient with energy and have a large physical size.

SUMMARY

An example method in accordance with some embodiments may include:configuring a plurality of transceiver modules in an antenna array withassigned receive signal weighting factors, the transceiver modulesinterconnected with high-speed data communication buses, and eachtransceiver module positioned adjacent to a respective antenna elementin the antenna array; configuring the plurality of transceiver modulesinto inter-communicating module groups by enabling the associatedhigh-speed data communication buses; receiving a plurality of wirelessdata signals with the plurality of transceiver modules and responsivelygenerating a corresponding plurality of receive baseband data signals;generating a plurality of received beamformed signals by combiningsubsets of the receive baseband signals within each module group usingthe assigned receive signal weighting factors by transmitting thereceive baseband signals between the transceiver modules within themodule group; and demodulating the received beamformed signals.

For some embodiments of the example method, each transceiver module mayinclude a plurality of polar transmitters.

For some embodiments of the example method, each transceiver module mayinclude a plurality of polar receivers, and wherein each polar receiverincludes an injection locked oscillator.

Some embodiments of the example method may further include: obtaining aplurality of transmit digital baseband signals at the antenna array fortransmission by the antenna array; distributing each transmit digitalbaseband signal to a respective plurality of transceiver modules; andapplying a transmit signal weighting factor of the assigned signalweighting factors to the transmit digital baseband signal at eachrespective transceiver module.

Some embodiments of the example method may further include: generating atransmit modulated signal from the transmit digital baseband signal ateach transceiver using a digital modulator and power amplifier; andcombining the transmit modulated signals.

For some embodiments of the example method, the transmit modulatedsignals are combined with a Wilkinson combiner.

An example additional method in accordance with some embodiments mayinclude: receiving a desired signal at an array of transceiver modulesarranged on a panel array, each module positioned adjacent to an antennaelement on the panel array, wherein each transceiver module comprises aplurality of digital demodulators, which may include a baseband signalcombiner; generating a demodulated baseband modulated signal from eachof the transceiver modules; and combining the digital baseband signalsat the panel array using the baseband signal combiners.

For some embodiments of the example additional method, the signalcombiners may be configured by a signal weighting factor.

For some embodiments of the example additional method, the signalweighting factor may include a beam forming weight.

For some embodiments of the example additional method, the beam formingweight may be a column weighting factor, a row weighting factor, orboth.

An example apparatus in accordance with some embodiments may include: aplurality of transceiver modules in an antenna array, each transceiverhaving an assigned receive signal weighting factor, each transceivermodule positioned adjacent to a respective antenna element in theantenna array; a plurality of high-speed data communication busesconnected to the plurality of transceiver modules; a controllerconfigured to transmit control signals to group the transceiver modulesinto inter-communicating module groups; a plurality of accumulatorsassociated with the transceiver module groups configured to receive aplurality of receive baseband data signals and to apply the assignedreceive signal weighting factors to form receive beamformed signals; anda demodulator configured to demodulate the received beamformed signals.

For some embodiments of the example apparatus, each transceiver modulemay include a plurality of polar transmitters.

For some embodiments of the example apparatus, each transceiver modulemay include a plurality of polar receivers, and wherein each polarreceiver includes an injection locked oscillator.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying figures, where like reference numerals refer toidentical or functionally similar elements throughout the separateviews, together with the detailed description below, are incorporated inand form part of the specification, and serve to further illustrateembodiments of concepts that include the claimed invention, and explainvarious principles and advantages of those embodiments.

FIG. 1 is a schematic perspective view illustrating a matrix array ofSoftware-Defined Radio (SDR) modules for an SDR system 100 according tosome embodiments.

FIG. 2A is a graph of an example frequency response 200 illustrating anRF synchronization control signal positioned in the center of an OFDMAchannel according to some embodiments.

FIG. 2B is a graph of an example frequency response 250 illustrating anRF synchronization control signal positioned at the edge of an OFDMA RFchannel signal according to some embodiments.

FIG. 3 is a block diagram illustrating block circuit connections for I/Qreceiver chain elements according to some embodiments.

FIG. 4 is a block diagram illustrating block circuit connections forpolar receiver chain elements according to some embodiments.

FIG. 5 is a block diagram illustrating block circuit connections for atransceiver with a power combiner for the Tx path components accordingto some embodiments.

FIG. 6 is a block diagram illustrating block circuit connections for atransceiver with the Tx RF signals combining in the air according tosome embodiments.

FIG. 7 is a block diagram illustrating block circuit connections for anarray of integrated Software-Defined Radio (SDR) modules according tosome embodiments.

FIG. 8 is a schematic plan view illustrating an example configuration ofdipoles superimposed with a 3×3 array of rectangular patches accordingto some embodiments.

FIG. 9 is a flowchart illustrating an example process for synchronizinga plurality of antenna array transceiver modules to align the phase of areceive carrier reference signal according to some embodiments.

FIG. 10 is a flowchart illustrating an example process for generatingand combining a plurality of transmit modulated signals according tosome embodiments.

FIG. 11 is a flowchart illustrating an example process for demodulatinga plurality of received modulated signals and combining baseband signalsaccording to some embodiments.

FIG. 12 is an example diagram showing an antenna array according to someembodiments.

FIG. 13 is an example diagram showing an example transceiver elementaccording to some embodiments.

FIG. 14 is a flowchart illustrating an example process for configuring atransceiver according to some embodiments.

Skilled artisans will appreciate that elements in the figures areillustrated for simplicity and clarity and have not necessarily beendrawn to scale. For example, the dimensions of some of the elements inthe figures may be exaggerated relative to other elements to help toimprove understanding of embodiments of the present invention.

The apparatus and method components have been represented whereappropriate by conventional symbols in the drawings, showing only thosespecific details that are pertinent to understanding the embodiments ofthe present invention so as not to obscure the disclosure with detailsthat will be readily apparent to those of ordinary skill in the arthaving the benefit of the description herein.

The entities, connections, arrangements, and the like that are depictedin—and described in connection with—the various figures are presented byway of example and not by way of limitation. As such, any and allstatements or other indications as to what a particular figure“depicts,” what a particular element or entity in a particular figure“is” or “has,” and any and all similar statements—that may in isolationand out of context be read as absolute and therefore limiting—may onlyproperly be read as being constructively preceded by a clause such as“In at least one embodiment, . . . ” For brevity and clarity ofpresentation, this implied leading clause is not repeated ad nauseum inthe detailed description of the drawings.

DETAILED DESCRIPTION

FIG. 1 is a schematic perspective view illustrating a matrix array ofSoftware-Defined Radio (SDR) modules for an SDR system 100 according tosome embodiments. FIG. 1 shows an example 4×8 matrix of SDR modules 104on a circuit board 106. Some embodiments have other matrixconfigurations of SDR modules 104. Each SDR module may include a 4×4matrix of sub-array transceiver elements. For some embodiments, an SDRmodule 104 may include a tunable radio digital-to-analog converter(DAC)/analog-to-digital-to-analog converter (ADAC), an RF switch (timedivision duplex (TDD) and frequency division duplex (FDD)), a digitalpower device (DPD), a power amplifier for each sub-array set oftransceiver elements.

A MIMO transceiver circuit board 106 may include an RF antenna 102according to some embodiments. The RF antenna 102 may be used totransmit a synchronization control signal to each SDR module 104. Thesynchronization control signal may be a signal that is transmitted witha center carrier frequency near the center of a desired receive channel.For some embodiments, the synchronization control signal may be aninformation signal that is used to determine the oscillator frequencyfor injection locked oscillator circuits associated with each SDR module104.

Some embodiments may have the oscillator circuit integrated with eachSDR module 104, and some embodiments may have part of the oscillatorcircuit external to an SDR module 104. In some embodiments, one RFantenna 102 is attached to a MIMO circuit board 106 or a housingassociated therewith. Some embodiments of the MIMO circuit board 106 mayhave multiple RF antennas 102, such as, for example, one RF antenna 102in multiple corners of the MIMO circuit board 106. For example, the MIMOcircuit board 106 may have an RF antenna 102 in each corner. A subset ofthe matrix of SDR modules may be assigned to each RF antenna 102.

For some embodiments, a row or column of the matrix array of SDR modules104 may be used to perform beam-forming. For example, a row of eight SDRmodules 104 may be used to create a phased-array transmit beam. Anoscillator circuit associated with each SDR module 104 may use amplitudeand phase and/or in-phase (I) and quadrature (Q) weightings to accountfor propagation delays, timings, and/or other geometries between thelocation of an RF antenna 102 and the antenna(s) used by each SDR module104.

With some embodiments, a calibration routine may be used to determinerelative propagation delays for each SDR module 104. Some embodimentsmay use a run-time calibration routine that may continually adjustweightings. Some embodiments may use a calibration routine thatconfigures weightings at power-up time. With some embodiments, acalibration look-up table may be used for a particular configuration ofa circuit board 106.

FIG. 2A is a graph of an example frequency response 200 illustrating anRF synchronization control signal positioned in the center of an OFDMAchannel according to some embodiments. The frequency response of anorthogonal frequency division multiple access (OFDMA) receive (Rx)signal 202 is shown in FIG. 2A for a particular channel. Ansynchronization control signal 204 may have a center carrier frequencythat is nearly equal to a center carrier frequency of the OFDMA Rxsignal 202 for a channel.

FIG. 2B is a graph of an example frequency response 250 illustrating anRF control signal positioned at the edge of an OFDMA RF channel signalaccording to some embodiments. Similar to FIG. 2A, the frequencyresponse of an OFDMA Rx signal 252 is shown in FIG. 2B for a particularchannel. An oscillator control signal 254 may have a center carrierfrequency equal to a frequency associated with the channel, such as afrequency near the bottom of the OFDMA channel. Some embodiments mayhave an oscillator control signal transmitted using a center carrierfrequency in-between (for example) the examples shown in FIGS. 2A and2B. Some embodiments may have an oscillator control signal transmittedusing a center carrier frequency higher or lower the than the centercarrier frequency of the oscillator control signals 204, 254 shown inFIGS. 2A and 2B.

FIG. 3 is a block diagram 300 illustrating block circuit connections forI/Q receiver chain elements according to some embodiments. An oscillatorcontrol signal may be transmitted by an RF antenna 320, which may becommon to one or more SDR modules, and received by an oscillator circuitantenna 318. The RF antenna 320 of FIG. 3 may be the same as the RFantenna 102 of FIG. 1 for some embodiments. The received oscillatorcontrol signal may be received by an input to an injection lockedoscillator (ILO) or phase-locked loop (PLL) circuit 308. Someembodiments of the SDR module 322 may have a common ILO/PLL circuit 308.For some embodiments, a linear noise amplifier (LNA) may inject thereceived signal into an oscillator sub-circuit. Oscillator controlsignals with phases of 0 and 90 degrees may be output by the oscillatorsub-circuit. These 0 and 90 degree phase signals may be used by mixersassociated with the respective I and Q circuit elements for each receivechain sub-module 302, 304, 306.

With some embodiments of a receive chain sub-module 302, 304, 306, an RFantenna associated with a receive chain sub-module 302, 304, 306 mayreceive an OFDMA signal transmitted by an external transmitter/antenna316. The external transmitter 316 may be a cell phone tower Tx antennaor a Tx antenna attached to a satellite, for example. The OFDMA receivesignal may propagate through an LNA and be split into I and Q path phasesignals. Each I and Q path phase signal may be mixed with the oscillatorcontrol signals with phases of 0 and 90 degrees, respectively togenerate I and Q signals for each receive chain sub-module 302, 304,306.

For some embodiments, each receive chain sub-module 302, 304, 306 mayoutput I and Q signals that are input to a combiner 310. While FIG. 3shows three receive chains sub-modules 302, 304, 306, some embodimentsof an SDR module 322 may have 8, 16, or another quantity of receivechain set of elements. The combiner 310 may receive combiner row andcolumn weights. For some embodiments, a complex multiply may beperformed by the combiner 310 or the multiply accumulator 312. Forexample, an example combiner output signal may be calculated as shown inEqn. 1.

Combined_(i,Q)=Σ_(r=0) ^(r=N−1)(l _(r) +jQ _(r))(w _(I) _(r) +jw _(Q)_(r) )   (1)

where r=0, . . . , N−1 for N sets of receive chains; w_(l) _(r) =thecombiner I weight for a receive chain r; and w_(Q) _(r) =the combiner Qweight for a receive chain r. For some embodiments, row and columncombiner weights may be received by the combiner 310 from a control bus314, and a matrix of Combined_(I,Q) values may be outputted by thecombiner 310 and sent to the multiply accumulator (MAC) 312. The matrixof Combined_(I,Q) values may be calculated using a matrix of respectiverow and column weights received by the control bus 314.

The MAC 312 may receive a summation of I signals (Σ_(I)), a summation ofQ signals (E_(Q)), and/or a summation of I and Q signals (Σ_(I,Q)) forsome embodiments. The MAC 312 also may receive a set of MAC row andcolumn weights. The MAC 312 may perform a complex multiply andaccumulation similar to Eq. 1 for a set of MAC weights in someembodiments. The MAC 312 may perform separate I and Q multiplicationsand accumulations for separate rows and columns according to someembodiments. The MAC 312 may output row and column accumulations thatmay be sent to the control bus 314. For some embodiments, the MACaccumulator outputs may correspond to distributed phase array signals ordistributed beamform signals.

FIG. 4 is a block diagram 400 illustrating block circuit connections forpolar receiver chain elements according to some embodiments. Anoscillator control signal may be transmitted by an RF antenna 420, whichmay be common to one or more SDR modules, and received by a receivechain's antenna. The RF antenna 420 of FIG. 4 may be the same as the RFantenna 102 of FIG. 1 for some embodiments. For each receive chainsub-module 402, 404, 406, the received oscillator control signal maypropagate through a linear noise amplifier (LNA) and be injected into aninjection lock oscillator (ILO) circuit. The oscillator control signalmay have a central carrier frequency that is substantially similar to acenter frequency of a MIMO Rx channel. The ILO circuit may use theoscillator control signal received from a MIMO transceiver circuit boardRF antenna 420 as part of a process to lock an oscillator associatedwith a receive chain sub-module 402, 404, 406. The ILO circuit mayoutput phase and amplitude path signals for each receive chainsub-module 402, 404, 406. The ILO circuit output signals may be receivedby a time to digital converter (TDC) for the phase and amplitude paths.A TDC synchronization circuit 408 may receive synchronization signalsfrom a control bus 414 for some embodiments. The TDC synchronizationcircuit 408 may send a synchronization signal to each TDC circuitassociated with each receive chain sub-module 402, 404, 406 tosynchronize the timing of TDC signals. Each receive chain sub-module402, 404, 406 may have TDC circuits to generate phase information andamplitude information.

In some embodiments, the TDC uses the example technology described inU.S. patent application Ser. No. 15/488,278, entitled “TIME TO DIGITALCONVERTER WITH INCREASED RANGE AND SENSITIVITY,” filed on Apr. 14, 2017,and incorporated by reference herein. Other implementations may be usedfor the TDC.

For some embodiments of a receive chain sub-module 402, 404, 406, an RFantenna associated with a receive chain sub-module 402, 404, 406 mayreceive an OFDMA signal transmitted by an external transmitter/antenna416. The external transmitter 416 may be a cell phone tower Tx antennaor a Tx antenna attached to a satellite, for example. The OFDMA receivesignal may propagate through an LNA and may be mixed with an ILO outputsignal to shift the OFDMA receive signal down to baseband, for someembodiments. Phase and amplitude information may be extracted from anILO circuit output signal. Phase and amplitude path signals may bereceived by a time-to-digital converter (TDC) for the phase andamplitude paths. A TDC synchronization circuit 408 may receivesynchronization signals from a control bus 414 for some embodiments. TheTDC synchronization circuit 408 may send a synchronization signal toeach TDC circuit associated with each receive chain sub-module 402, 404,406 to synchronize the timing of TDC signals. Each receive chainsub-module 402, 404, 406 may have TDC circuits to generate phaseinformation and amplitude information for each receive chain sub-module402, 404, 406.

For some embodiments, output signals of the TDC synchronization circuit408 may be time-to-digital conversion (TDC) synchronization signals.Such TDC synchronization output signals may be received by TDCprocessing circuits for each receive chain sub-module 402, 404, 406 andprocessed to adjust the phase output signal of each receive chainsub-module 402, 404, 406. The phase of each transceiver module's phaseoutput signal may be adjusted so as to align the phase of a receivecarrier reference signal.

Some embodiments of the receive chain sub-module 402, 404, 406 (ortransceiver module, such as the transceiver module 104 of FIG. 1 ), mayinclude an injection-locked oscillator (ILO) that locks to the TDCsynchronization circuit's synchronization output signal. The ILO of eachreceive chain sub-module 402, 404, 406 (or transceiver module) maygenerate a local downconversion signal that may be used to downconvert adesired received channel signal. For example, an LNA of a transceivermodule may receive a modulated RF signal via an antenna, and the LNA maygenerate an output signal that is mixed with the ILO output signal. Thelocal downconversion signal may be used to control the ILO so that theoutput of the mixed ILO signal is a downconverted signal for the desiredreceived channel signal.

For some embodiments, the ILO may generate a localtime-to-digital-converter (TDC) reference signal that may be used tosynchronize a plurality of polar transceivers. For example, the localTDC signal of each receive chain sub-module 402, 404, 406 (ortransceiver module) may be used to generate an output signal of eachtransceiver module's TDC processing circuit that may be used tosynchronize receive signals received by each receive chain sub-module402, 404, 406 (or transceiver module).

With some embodiments of the transceiver module, each transceiver modulemay include a plurality of polar receivers (such as receive chainsub-modules 402, 404, 406), wherein each polar receiver may include aninjection-locked oscillator (ILO) that is tuned to lock onto thesynchronization signal and adjust (or deviate) according to modulationpresent in the desired received signal.

A combiner 410 may receive phase and amplitude signals for each receivechain sub-module 402, 404, 406. The combiner 410 also may receive rowand column weights from the control bus 414. While FIG. 4 shows threereceive chains sub-modules 402, 404, 406, some embodiments of an SDRmodule 422 may have 8, 16, or another quantity of receive chain set ofelements. The combiner 410 may receive combiner row and column weights.For some embodiments, amplitude and phase information may be convertedinto I and Q information. The conversion from amplitude and phase to Iand Q may be performed with a CORDIC circuit, which may be internal tothe combiner 410 for some embodiments. Some embodiments may use the Iand Q information to calculate accumulated I and Q values, which may besimilar to Eq. 1. For some embodiments, a complex multiply may beperformed by the combiner 410 or the multiply accumulator 412. For someembodiments, row and column combiner weights may be received by thecombiner 410 from a control bus 414, and a matrix of Combined_(I,Q)values may be outputted by the combiner 410 and sent to the multiplyaccumulator (MAC) 412. The matrix of Combined_(I,Q) values may becalculated using a matrix of respective row and column weights receivedby the control bus 414. For some embodiments, a signal combiner may beconfigured with a signal weighting factor. The signal weighting factormay be communicated to the combiner 410 with the combiner row weight inand combiner column row weight in signals. The signal weighting factormay be communicated to the MAC 412 with the MAC row weight in and MACcolumn weight in signals. With some embodiments, the signal weightingfactor may include a beam forming weight. The beam forming weight may bea column weighting factor, a row weighting factor, or both a row and acolumn weight factor for some embodiments.

The MAC 412 may receive a summation of I signals (Σ_(I)), a summation ofQ signals (Σ_(Q)), and/or a summation of I and Q signals (Σ_(I,Q)) forsome embodiments. The MAC 412 also may receive a set of MAC row andcolumn weights. The MAC 412 may perform a complex multiply andaccumulation, e.g., similar to Eq. 1 for a set of MAC weights in someembodiments. The MAC 412 may perform separate I and Q multiplicationsand accumulations for separate rows and columns according to someembodiments. The MAC 412 may output row and column accumulations thatmay be sent to the control bus 414. For some embodiments, the MACaccumulator outputs may correspond to distributed phase array signals ordistributed beamform signals. Some embodiments may sum amplitude andphase information separately without performing a complexmultiplication.

FIG. 5 is a block diagram illustrating block circuit connections for atransceiver 500 with a power combiner for the Tx path componentsaccording to some embodiments. FIG. 5 shows an example configuration ofan SDR module 504 with up to 8 transmit chain of elements and 1 receivechain of elements. Some embodiments of an SDR module 504 may include adifferent quantity of transmit and receive chains of elements.

For some embodiments, a Tx signal with phase information may be receivedby a phase circuit 510 for each transmit chain. A phase lock loop (PLL)circuit 512 may generate a signal to inject into a digital poweramplifier (DPA) 508 for each transmit chain. Each transmit chain's DPA508 may generate an amplified and modulated output signal using thephase and PLL input signals. Each transmit chain's amplified andmodulated output signal may be injected into a power combiner. Each SDRmodule 504 may contain a power combiner 506. The digitally combinedpower signal may be transmitted by the transceiver via an RF antenna 502associated connected to the SDR module 504.

For some embodiments, the power combiner 506 may be a Wilkinsoncombiner, and transmit modulated signals may be combined with theWilkinson combiner. With some embodiments, the transmit modulatedsignals may be combined as electromagnetic energy (which may occur inthe air between a transmitter and a receiver, for example) by connectingeach power amplifier (such as the output of each digital power amplifier(DPA) 508) to one of a plurality of dipole antennas (such as the dipoleantenna 502). For some embodiments, one or more transceiver modules (ortransmit chain elements, which may include a DPA 508, a phase circuit510, and a PLL circuit 512) may be configured with a weighting factorused for beam forming. The power combiner 506 (or a transceiver module504) may receive weighting factors, such as row and column weightfactors, that may be used to adjust power levels for beam forming oftransmit signals.

In some embodiments, an Rx signal may be received by an RF antenna 502associated with an SDR module 504. Some embodiments of a receive chainof components may have a linear noise amplifier (LNA) 514 that receivesa modulated RF signal on an SDR module's 504 RF antenna 502. The outputof the LNA 514 may injected into a mixer 516 and mixed with a PLL signalto generate an Rx path input signal. The output of the ILO 516 may bereceived by an analog to digital converter (ADC) 518. The ADC 518 maygenerate a receive output signal (RX).

In some embodiments, a transmit modulated signal may be generated from atransmit digital baseband signal at each transceiver using a digitalmodulator and a power amplifier and combining the transmit modulatedsignals. For example, an SDR module 504 may be generated by inputting atransmit signal TX into each phase circuit 510. The output of each phasecircuit 510 may be inputted into a digital power amplifier (DPA) 508.Each DPA 508 may generate an input signal to a power combiner 506. Thepower combiner 506 may combine each of the DPA output signals togenerate a transmit modulated signal.

FIG. 6 is a block diagram illustrating block circuit connections for atransceiver 600 with the Tx RF signals combining in the air according tosome embodiments. FIG. 6 shows an example configuration of an SDR module604 with up to 8 transmit chain of elements and 8 receive chains ofelements. Some embodiments of an SDR module 604 may include a differentquantity of transmit and receive chains of elements.

For some embodiments, a Tx signal with phase information may be receivedby a phase circuit 610 for each transmit chain. A phase lock loop (PLL)circuit 612 may generate a signal to inject into a digital poweramplifier (DPA) 608 for each transmit chain. Each transmit chain's DPA608 may generate an amplified and modulated output signal using thephase and PLL input signals. Each transmit chain's amplified andmodulated output signal may be transmitted by an RF antenna 602. Someembodiments may have a separate RF antenna 602 per transmit/receiverchain pair.

In some embodiments, an OFDMA modulated signal may be received by an RFantenna 602 associated with an SDR module 604. Some embodiments of areceive chain of components may have a linear noise amplifier (LNA) 614that receives a modulated RF signal on an SDR module's 604 RF antenna602. The output of the LNA 614 may injected into a mixer 616 and mixedwith a PLL signal to generate an Rx path input signal. The output of theILO 616 may be received by an analog to digital converter (ADC) 618. TheADC 618 may generate a receive output signal (RX). Each SDR module 604may contain a power combiner 606 that may be used to combine eachreceive chain's Rx signal (RX0, RX1, . . . , RX7) to generate a combinedRX signal. The digitally combined RX signal may be connected to othercomponents on a transceiver circuit board.

For some embodiments, each transceiver module may include a plurality ofpolar receivers, and each polar receiver may include an injection lockedoscillator. For example, an SDR module 604 may include a plurality ofpolar receivers, each of which may include, for example, a PLL circuit612, an LNA 614, a mixer 616, and an ADC 618. Each of the plurality ofpolar receivers may include an injection locked oscillator, which may bepart of a PLL circuit 612.

FIG. 7 is a block diagram illustrating block circuit connections for anarray of integrated Software-Defined Radio (SDR) modules 700 accordingto some embodiments. A phased array system may combine an RF modulatedsignal through weighting and summation of signals (such as I and Qreceive data or amplitude and phase receive data). Each SDR module 702,704, 706, 708 may include an integrated multiply-accumulator (MAC) toenable distributed combining. Such a configuration may enablescalability of a transceiver. Some embodiments may use differentquantities of SDR modules 702, 704, 706, 708.

FIG. 8 is a schematic plan view illustrating an example dipoleconfiguration 800 with dipoles superimposed with a 3×3 array ofrectangular patches according to some embodiments. FIG. 8 shows aconfiguration of staggered dipoles 802 and a 3×3 array of rectangularpatches 804. A single microstrip patch 804 may be replaced with threeplanar dipole elements 802 that may fit within a similar size area as asingle microstrip patch 804. For some embodiments, planar dipoleelements may be used instead of microstrip patches. With someembodiments, a triplet of dipoles may be used per SDR module. Someembodiments may different sets of dipoles to adjust spacing betweendipoles, such as to increase isolation between dipoles for example.

For some embodiments, a transmit modulated signal may be transmittedusing a plurality of dipoles 802 connected to a transceiver module (suchas the transceiver module 104 of FIG. 1 ) or a transmit chainsub-module, such as a transmit chain of elements shown in FIG. 5 (whichmay include a DPA 508, a phase circuit 510, and a PLL 512). With someembodiments, the plurality of dipoles 802 may be arranged as an array804.

FIG. 9 is a flowchart illustrating an example process 900 forsynchronizing a plurality of antenna array transceiver modules to alignthe phase of a receive carrier reference signal according to someembodiments. For some embodiments, a method may include transmitting 902a synchronization signal to a plurality of transceiver modulesconfigured in an antenna array. Each transceiver module may process 904the synchronization signal and responsively align a phase of a receivecarrier reference signal. For example, the synchronization signal may bea time-to-digital conversion (TDC) synchronization signal as shown inFIG. 4 . Such a TDC synchronization may be received by each module andprocessed to adjust the phase output signal of each receive chainsub-module (or transceiver module).

FIG. 10 is a flowchart illustrating an example process for generatingand combining a plurality of transmit modulated signals according tosome embodiments. A method 1000 may include receiving 1002 a digitalbaseband signal at an array of transceiver modules, wherein eachtransceiver module may include a plurality of digital modulators. Themethod 1000 also may include generating 1004 a transmit modulated signalfrom the digital baseband signal at each of the plurality of digitalmodulators and power amplifiers. The method 1000 may further includecombining 1006 the transmit modulated signals, such as with a powercombiner. The combined signal may be transmitted via an RF antenna.

FIG. 11 is a flowchart illustrating an example process 1100 fordemodulating a plurality of received modulated signals and combiningbaseband signals according to some embodiments. A method 1100 mayinclude receiving 1102 a desired signal at an array of transceivermodules arranged on a panel array, with each module positioned adjacentto an antenna element on the panel array, wherein each transceivermodule may include a plurality of digital demodulators, and may includea baseband signal combiner. The method 1100 also may include generating1104 a demodulated baseband modulated signal from each of thetransceiver modules. The method 1100 may further include combining thedigital baseband signals at the panel array using the baseband signalcombiners, such as the digital combiner of FIG. 6 .

FIG. 12 is an example diagram showing an antenna array according to someembodiments. In some embodiments, the example antenna array portion ispart of a variable sub-array that includes transceiver elements. Theantenna array portion 1200 may include multiple transceiver elements. Rxsignals may be received via a plurality of antenna patch elements. Rxsignals may be daisy-chained together and communicated between eachtransceiver element via an Rx serial bus. A DSP may be connected to theRx serial bus and may receive a summed Rx signal that has been weightedand summed by each transceiver element. Modulated Tx signals may bereceived by each transceiver element from a DSP via the Tx serial bus.Control data may be received by each transceiver element from a DSP tocontrol the Rx and Tx circuit elements within each transceiver element.Weighted and summed Rx signals may be in I and Q format for someembodiments. Weighted and summed Rx signals also may be in polar formatfor some embodiments. Similarly, modulated Tx signals may be in I and Qformat for some embodiments and in polar format for some embodiments.

For some embodiments, a transceiver may perform a process that includesobtaining a plurality of transmit digital baseband signals at theantenna array for transmission by the antenna array; distributing eachtransmit digital baseband signal to a respective plurality oftransceiver modules; and applying a transmit signal weighting factor ofthe assigned signal weighting factors to the transmit digital basebandsignal at each respective transceiver module. For example, a transmitdigital baseband signal may be generated for transmission by an antennaarray, such as the antenna patch array shown in FIG. 12 . The transmitdigital baseband signal may distributed to a respective plurality oftransceiver modules, such as each RFIC chip of the array of RFIC chipsshown in FIG. 12 . A transmit weighting factor may be applied by eachtransceiver module. Each weighting factor may be assigned to aparticular transceiver module.

FIG. 13 is an example diagram showing an example transceiver elementaccording to some embodiments. FIG. 13 shows one example circuitimplementation of a transceiver element 1300. The example transceiverelement 1300 may have separate serial data buses for Rx, Tx, and controldata. Rx and Tx signals may be received by the transceiver element 1300as shown on the left side of FIG. 13 . Rx and Tx weightings also may bereceived by the control data input shown on the left side of FIG. 13 ,Serialized/deserialized (SERDES) circuit elements may be used to convertbetween serial and parallel input data. Rx and Tx weightings may be incomplex I and Q (in-phase and quadrature) format for some embodiments.Rx and Tx weightings also may be in polar (amplitude and phase) formatfor some embodiments. Control data also may include time delay settings.Time delay settings and Tx weightings may be configured to enable aplurality of transmitter circuit elements to be arranged for beamformingfor communication with one or more satellites. Similarly, time delaysettings and Rx weightings may be configured to enable a plurality ofreceiver elements to be arranged to receive an array of modulatedsignals from a satellite. RF signals may be received from a satellitevia a patch element. The received signal may go through a duplexer andbe received at the input to the Rx circuit element shown in FIG. 13 .The Rx circuit element may be controlled by data received on the controlserial bus input line. The output of the Rx element may be weighted andsummed with Rx data received on the Rx serial bus input line. Anadjustable delay may be configured to delay Rx signal data received bythe Rx serial bus. Summed Rx signals may be processed by a SERDEScircuit element to convert the de-serialized Rx signal data into serialdata format. The Rx serial bus data may be outputted via the Rx serialbus output. Similarly, modulated Tx signal data may be received by theTx serial bus input. The modulated Tx signal data may be inputted intothe Tx circuit element. The Tx circuit element may be controlled by datareceived by the control data bus. The output of the Tx circuit elementmay be weighted in I and Q format for some embodiments. Some embodimentsmay weight the output of the Tx circuit element in polar format.Weighted Tx signals may be sent to the duplexer and transmitted to asatellite via the patch element. For some embodiments, each transceivermodule may include a plurality of polar transmitters, such as the polartransmitter shown in FIG. 13 .

FIG. 14 is a flowchart illustrating an example process for configuring atransceiver according to some embodiments. For some embodiments, atransceiver may perform an example process 1400 that includesconfiguring 1402 a plurality of transceiver modules in an antenna arraywith assigned receive signal weighting factors, the transceiver modulesinterconnected with high-speed data communication buses, and eachtransceiver module positioned adjacent to a respective antenna elementin the antenna array. The process 1400 performed by the transceiver mayfurther include configuring 1404 the plurality of transceiver modulesinto inter-communicating module groups by enabling the associatedhigh-speed data communication buses. The process 1400 performed by thetransceiver may further include receiving 1406 a plurality of wirelessdata signals with the plurality of transceiver modules and responsivelygenerating a corresponding plurality of receive baseband data signals.The process 1400 performed by the transceiver may further includegenerating 1408 a plurality of received beamformed signals by combiningsubsets of the receive baseband signals within each module group usingthe assigned receive signal weighting factors by transmitting thereceive baseband signals between the transceiver modules within themodule group. The process 1400 performed by the transceiver may furtherinclude demodulating 1410 the received beamformed signals.

For some embodiments, an example apparatus may include: a plurality oftransceiver modules in an antenna array, each transceiver having anassigned receive signal weighting factor, each transceiver modulepositioned adjacent to a respective antenna element in the antennaarray; a plurality of high-speed data communication buses connected tothe plurality of transceiver modules; a controller configured totransmit control signals to group the transceiver modules intointer-communicating module groups; a plurality of accumulatorsassociated with the transceiver module groups configured to receive aplurality of receive baseband data signals and to apply the assignedreceive signal weighting factors to form receive beamformed signals; anda demodulator configured to demodulate the received beamformed signals.An example of such an apparatus may be as shown in FIGS. 12 and 13 .

An example method in accordance with some embodiments may include:configuring a plurality of transceiver modules in an antenna array withassigned receive signal weighting factors, the transceiver modulesinterconnected with high-speed data communication buses, and eachtransceiver module positioned adjacent to a respective antenna elementin the antenna array; configuring the plurality of transceiver modulesinto inter-communicating module groups by enabling the associatedhigh-speed data communication buses; receiving a plurality of wirelessdata signals with the plurality of transceiver modules and responsivelygenerating a corresponding plurality of receive baseband data signals;generating a plurality of received beamformed signals by combiningsubsets of the receive baseband signals within each module group usingthe assigned receive signal weighting factors by transmitting thereceive baseband signals between the transceiver modules within themodule group; and demodulating the received beamformed signals.

For some embodiments of the example method, each transceiver module mayinclude a plurality of polar transmitters.

For some embodiments of the example method, each transceiver module mayinclude a plurality of polar receivers, and wherein each polar receiverincludes an injection locked oscillator.

Some embodiments of the example method may further include: obtaining aplurality of transmit digital baseband signals at the antenna array fortransmission by the antenna array; distributing each transmit digitalbaseband signal to a respective plurality of transceiver modules; andapplying a transmit signal weighting factor of the assigned signalweighting factors to the transmit digital baseband signal at eachrespective transceiver module.

Some embodiments of the example method may further include: generating atransmit modulated signal from the transmit digital baseband signal ateach transceiver using a digital modulator and power amplifier; andcombining the transmit modulated signals.

For some embodiments of the example method, the transmit modulatedsignals are combined with a Wilkinson combiner.

An example additional method in accordance with some embodiments mayinclude: receiving a desired signal at an array of transceiver modulesarranged on a panel array, each module positioned adjacent to an antennaelement on the panel array, wherein each transceiver module comprises aplurality of digital demodulators, which may include a baseband signalcombiner; generating a demodulated baseband modulated signal from eachof the transceiver modules; and combining the digital baseband signalsat the panel array using the baseband signal combiners.

For some embodiments of the example additional method, the signalcombiners may be configured by a signal weighting factor.

For some embodiments of the example additional method, the signalweighting factor may include a beam forming weight.

For some embodiments of the example additional method, the beam formingweight may be a column weighting factor, a row weighting factor, orboth.

An example apparatus in accordance with some embodiments may include: aplurality of transceiver modules in an antenna array, each transceiverhaving an assigned receive signal weighting factor, each transceivermodule positioned adjacent to a respective antenna element in theantenna array; a plurality of high-speed data communication busesconnected to the plurality of transceiver modules; a controllerconfigured to transmit control signals to group the transceiver modulesinto inter-communicating module groups; a plurality of accumulatorsassociated with the transceiver module groups configured to receive aplurality of receive baseband data signals and to apply the assignedreceive signal weighting factors to form receive beamformed signals; anda demodulator configured to demodulate the received beamformed signals.

For some embodiments of the example apparatus, each transceiver modulemay include a plurality of polar transmitters.

For some embodiments of the example apparatus, each transceiver modulemay include a plurality of polar receivers, and wherein each polarreceiver includes an injection locked oscillator.

Some embodiments of a method may include: transmitting a synchronizationsignal to a plurality of transceiver modules configured in an antennaarray; and each transceiver module processing the synchronization signaland responsively aligning a phase of a receive carrier reference signal.

In some embodiments of a method, each transceiver module may include aninjection locked oscillator (ILO) that locks to the synchronizationsignal.

With some embodiments of a method, the ILO may generate a localdownconversion signal used to downconvert a desired received channelsignal.

In some embodiments of a method, the ILO may generate a localtime-to-digital-converter (TDC) reference signal used to synchronize aplurality of polar transceivers.

In some embodiments of a method, each transceiver module may include aplurality of polar receivers, wherein each polar receiver includes aninjection locked oscillator that is tuned to lock onto thesynchronization signal, and deviate according to modulation present inthe desired received signal.

Some embodiments of a method may include: receiving a digital basebandsignal at an array of transceiver modules, wherein each transceivermodule may include a plurality of digital modulators; generating atransmit modulated signal from the digital baseband signal at each ofthe plurality of digital modulators and power amplifiers; and, combiningthe transmit modulated signals.

In some embodiments of a method, the transmit modulated signals may becombined with a Wilkinson combiner.

With some embodiments of a method, the transmit modulated signals may becombined as electromagnetic energy by connecting each power amplifier toone of a plurality of dipole antennas.

In some embodiments of a method, the plurality of dipole antennas may bearranged in an array.

For some embodiments of a method, one or more transceiver modules may beconfigured with a weighting factor used for beam forming.

Some embodiments of a method may include receiving a desired signal atan array of transceiver modules arranged on a panel array, each modulepositioned adjacent to an antenna element on the panel array, whereineach transceiver module may include a plurality of digital demodulators,and may include a baseband signal combiner; generating a demodulatedbaseband modulated signal from each of the transceiver modules; andcombining the digital baseband signals at the panel array using thebaseband signal combiners.

In some embodiments of a method, the signal combiners may be configuredby a signal weighting factor.

In some embodiments of a method, the signal weighting factor may includea beam forming weight.

In some embodiments of a method, the beam forming weight may be a columnweighting factor, a row weighting factor, or both.

Some embodiments of an apparatus may include: a plurality of transceivermodules configured in an antenna array; a synchronization transmissioncircuit configured to transmit a synchronization signal to the pluralityof transceiver modules; a receive carrier generation circuit configuredto generate a receive carrier reference signal; and a synchronizationprocessing circuit configured to process the synchronization signal andto align a phase of the receive carrier reference signal.

Some embodiments of an apparatus may include: a plurality of transceivermodules arranged in an array and configured to receive a digitalbaseband signal; a plurality of digital modulators and power amplifierseach configured to generate a transmit modulated signal from the digitalbaseband signal; and a combiner configured to combine the transmitmodulated signals.

Some embodiments of an apparatus may include: a plurality of antennaelements on a panel array; a plurality of transceiver modules arrangedon the panel array to be adjacent to one of the plurality of antennaelements and configured to receive a desired signal, wherein eachtransceiver module may include a plurality of digital demodulators, andincludes a baseband signal combiner; a demodulation circuit configuredto generate a demodulated baseband signal from each of the transceivermodules; and a combiner configured to combine the digital basebandsignals at the panel array using the baseband signal combiners.

In the foregoing specification, specific embodiments have beendescribed. However, one of ordinary skill in the art would appreciatethat various modifications and changes can be made without departingfrom the scope of the invention as set forth in the claims below.Accordingly, the specification and figures are to be regarded in anillustrative rather than a restrictive sense, and all such modificationsare intended to be included within the scope of present teachings.

The benefits, advantages, solutions to problems, and any element(s) thatmay cause any benefit, advantage, or solution to occur or become morepronounced are not to be construed as a critical, required, or essentialfeatures or elements of any or all the claims. The invention is definedsolely by the appended claims including any amendments made during thependency of this application and all equivalents of those claims asissued.

Moreover, in this document, relational terms such as first and second,top and bottom, and the like may be used solely to distinguish oneentity or action from another entity or action without necessarilyrequiring or implying any actual such relationship or order between suchentities or actions. The terms “comprises,” “comprising,” “has,”“having,” “includes,” “including,” “contains,” “containing,” or anyother variation thereof, are intended to cover a non-exclusiveinclusion, such that a process, method, article, or apparatus thatcomprises, has, includes, contains a list of elements does not includeonly those elements but may include other elements not expressly listedor inherent to such process, method, article, or apparatus. An elementproceeded by “comprises . . . a”, “has . . . a”, “includes . . . a”,“contains . . . a” does not, without more constraints, preclude theexistence of additional identical elements in the process, method,article, or apparatus that comprises, has, includes, contains theelement. The terms “a” and “an” are defined as one or more unlessexplicitly stated otherwise herein. The terms “substantially”,“essentially”, “approximately”, “about”, or any other version thereof,are defined as being close to as understood by one of ordinary skill inthe art, and in one non-limiting embodiment the term is defined to bewithin 10%, in another embodiment within 5%, in another embodimentwithin 1% and in another embodiment within 0.5%. The term “coupled” asused herein is defined as connected, although not necessarily directlyand not necessarily mechanically. A device or structure that is“configured” in a certain way is configured in at least that way, butmay also be configured in ways that are not listed.

It will be appreciated that some embodiments may comprise one or moregeneric or specialized processors (or “processing devices”) such asmicroprocessors, digital signal processors, customized processors andfield programmable gate arrays (FPGAs) and unique stored programinstructions (including both software and firmware) that control the oneor more processors to implement, in conjunction with certainnon-processor circuits, some, most, or all of the functions of themethod and/or apparatus described herein. Alternatively, some or allfunctions could be implemented by a state machine that has no storedprogram instructions, or in one or more application specific integratedcircuits (ASICs), in which each function or some combinations of certainof the functions are implemented as custom logic. Of course, acombination of the two approaches could be used.

Accordingly, some embodiments of the present disclosure, or portionsthereof, may combine one or more processing devices with one or moresoftware components (e.g., program code, firmware, resident software,micro-code, etc.) stored in a tangible computer-readable memory device,which in combination form a specifically configured apparatus thatperforms the functions as described herein. These combinations that formspecially programmed devices may be generally referred to herein as“modules.” The software component portions of the modules may be writtenin any computer language and may be a portion of a monolithic code base,or may be developed in more discrete code portions such as is typical inobject-oriented computer languages. In addition, the modules may bedistributed across a plurality of computer platforms, servers,terminals, and the like. A given module may even be implemented suchthat separate processor devices and/or computing hardware platformsperform the described functions.

Moreover, an embodiment can be implemented as a computer-readablestorage medium having computer readable code stored thereon forprogramming a computer (e.g., comprising a processor) to perform amethod as described and claimed herein. Examples of suchcomputer-readable storage media include, but are not limited to, a harddisk, a CD-ROM, an optical storage device, a magnetic storage device, aROM (Read Only Memory), a PROM (Programmable Read Only Memory), an EPROM(Erasable Programmable Read Only Memory), an EEPROM (ElectricallyErasable Programmable Read Only Memory) and a Flash memory. Further, itis expected that one of ordinary skill, notwithstanding possiblysignificant effort and many design choices motivated by, for example,available time, current technology, and economic considerations, whenguided by the concepts and principles disclosed herein will be readilycapable of generating such software instructions and programs and ICswith minimal experimentation.

The Abstract of the Disclosure is provided to allow the reader toquickly ascertain the nature of the technical disclosure. It issubmitted with the understanding that it will not be used to interpretor limit the scope or meaning of the claims. In addition, in theforegoing Detailed Description, it can be seen that various features aregrouped together in various embodiments for the purpose of streamliningthe disclosure. This method of disclosure is not to be interpreted asreflecting an intention that the claimed embodiments require morefeatures than are expressly recited in each claim. Rather, as thefollowing claims reflect, inventive subject matter lies in less than allfeatures of a single disclosed embodiment. Thus the following claims arehereby incorporated into the Detailed Description, with each claimstanding on its own as a separately claimed subject matter.

What is claimed:
 1. An apparatus comprising: a plurality ofinterconnected transceiver modules configured in an array, eachtransceiver module comprising: an oscillator configured to generate aphase-locked-loop (PLL) carrier frequency; a serial data bus interfaceconfigured to receive a transmit digital baseband signal; a plurality ofphase circuits configured to receive the transmit digital basebandcircuit; a plurality of digital power amplifiers (DPAs) connected to theoscillator and to respective ones of the plurality of phase circuits,and configured to output a modulated transmit signal based on thetransmit digital baseband signal and the PLL carrier frequency; a powercombiner to combine outputs of the plurality of DPAs into a transmitsignal; and, a plurality of antenna radiating elements configured in anarray and connected to respective power combiners of the plurality ofinterconnected transceiver modules.
 2. The apparatus of claim 1 whereineach transceiver module is configured to apply signal weights to adjusta phase of the transmit signal.
 3. The apparatus of claim 1 furthercomprising a calibration circuit configured to measure the transmitsignal of each transceiver and to responsively adjust a signal weightingapplied to adjust a phase of the transmit signal.
 4. The apparatus ofclaim 1, wherein each transceiver module further comprises a low noiseamplifier (LNA) to receive a radio frequency signal, and a frequencymixer connected to the LNA and to the oscillator for downconverting thereceived radio frequency signal.
 5. The apparatus of claim 1 wherein theplurality of interconnected transceiver modules configured in an arraycomprise one or more columns or rows of transceiver modules areconfigured to use signal weights to perform beamforming.
 6. A methodcomprising: interconnecting a plurality of transceiver modulesconfigured in an array; at each transceiver module: generating aphase-locked-loop (PLL) carrier frequency with an oscillator; receivinga transmit digital baseband signal using a serial data bus interface;applying the transmit digital baseband signal to a plurality of phasecircuits; outputing a modulated transmit signal based on the transmitdigital baseband signal from respective phase circuits and based on thePLL carrier frequency; combining outputs of the plurality of DPAs, usinga power combiner, to generate a transmit signal; and, transmittingrespective transmit signals from a plurality of antenna radiatingelements configured in an array.
 7. The method of claim 6 furthercomprising applying signal weights to adjust a phase of the transmitsignal.
 8. The method of claim 6 further comprising measuring thetransmit signal of each transceiver and responsively adjusting a signalweighting applied to adjust a phase of the transmit signal.
 9. Themethod of claim 6, further comprising receiving a radio frequency signalat a low noise amplifier (LNA) at each transceiver module, and using afrequency mixer connected to the LNA and to the oscillator,downconverting the received radio frequency signal.
 10. The method ofclaim 6 further comprising configuring one or more columns or rows oftransceiver modules to use signal weights to perform beamforming.